A 5-Megapixel 100-frames-per-second 0.5erms Low Noise CMOS Image Sensor With Column-Parallel Two-Stage Oversampled Analog-to-Digital Converter
نویسندگان
چکیده
This paper reports a CIS readout channel conceived for half-electron noise by combining semi-empirical pixel noise model fitting, S&H-free two-stage ADC with over-sampling, optimized pixel control and Correlated Multiple Sampling (CMS). The ADC architecture consists of a first-order modulator that generate the MSBs followed by a ramp converter. Closed loop self correction is employed for low non-linearity. Correlated Double Sampling (CDS) is implemented in the 1st modulator by integrating signal and reset in opposite directions.
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